[BLAST_ANAWARE] Spin/helicity bits in the ADC

From: Karen Dow (kdow@mit.edu)
Date: Thu Jul 31 2003 - 13:12:36 EDT


        Tavi mentioned yesterday that he may not have reconnected the
spin/helicity bits (which go to an ADC so they're recorded with the physics
event data) correctly after borrowing those channels for Cerenkov gain
matching. I checked the order at the splitter panel, and found the cable
ordering did NOT agree with the order at the patch panel from the
ABS. When I first cabled them months ago, the two agreed. Perhaps someone
changed the order in the meantime for a good reason, or maybe the
discrepancy arose from Tavi's recent borrowing. Someone who knows which
channel corresponds to which bit (at the ABS end, and also in the ADC)
could comment -- Vitaliy, probably.

        I've put the cables at the splitter panel back in the order given at the
patch panel from the ABS, and added labels (at the ABS patch, the level
adapter and the splitter panel) to the 3 cables that had none.

                        I found: Corrected to:
ADC channel Cable Label Cable Label
------------------- ------------------- --------------------

56 ABS 5 BEAMHEL
57 ABS 6 TARGSTAT
58 BEAMHEL TARGHEL
59 TARGSTAT --- (4th signal, now labeled "4")
60 TARGHEL ABS 5
61 --- (4th signal) ABS 6
62 --- (7th signal) --- (7th signal, now labeled "7")
63 --- (8th signal) --- (8th signal, now labeled "8")

If someone knows that the cables were scrambled for a reason, please undo
what I've done.

                                                Karen



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